The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2005
Filed:
Dec. 12, 2001
Sergej B. Gashkov, Moscow, RU;
Alexander E. Andreev, San Jose, CA (US);
Aiguo LU, Cupertino, CA (US);
Sergej B. Gashkov, Moscow, RU;
Alexander E. Andreev, San Jose, CA (US);
Aiguo Lu, Cupertino, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An adder based circuit embodied in an integrated circuit includes an input module, a carry module and an output module. The carry module has a minimum depth defined by a recursive expansion of at least one function associated with the carry module based on a variable k derived from a Fibonacci series. Invertor, XOR, XNOR (more preferably, OR(NOT(a),b)) and multiplexer elements are selectively coupled to the input and output modules to configure the adder based circuit as a subtractor, adder-subtractor, incrementor, decrementor, incrementer-decrementor or absolute value calculator. A computer process of designing the adder base circuit recursively expands the functions, and optimization of death, fanout and distribution of negations is performed.