The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2005

Filed:

May. 08, 2002
Applicants:

Takashi Itou, Hyogo, JP;

Yasuhiko Tsukikawa, Hyogo, JP;

Inventors:

Takashi Itou, Hyogo, JP;

Yasuhiko Tsukikawa, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

A P-channel MOS transistor is provided between a terminal and an SVIH detection circuit for performing test mode detection. The P-channel MOS transistor is rendered non-conductive when a potential supplied to the terminal that is used commonly for signal input during the test setting and the normal operation is a power-supply potential EXTVDD or below. The SVIH detection circuit detects that a test mode is to be set when the potential at the terminal becomes higher than a prescribed potential. During the normal operation, the terminal is disconnected from the SVIH detection circuit so that the input capacitance of the terminal can be made to be about the same as that of another input terminal, and a high speed operation becomes possible. Moreover, there is no need to take into account the parasitic capacitance of an interconnection line leading to the SVIH detection circuit.


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