The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2005
Filed:
Nov. 28, 2000
Raymond C. Pang, San Jose, CA (US);
Walter N. Sze, Saratoga, CA (US);
Jennifer Wong, Fremont, CA (US);
Stephen M. Trimberger, San Jose, CA (US);
John M. Thendean, Berkely, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Raymond C. Pang, San Jose, CA (US);
Walter N. Sze, Saratoga, CA (US);
Jennifer Wong, Fremont, CA (US);
Stephen M. Trimberger, San Jose, CA (US);
John M. Thendean, Berkely, CA (US);
Kameswara K. Rao, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
To prevent copying of a design implemented in a programmable logic device (PLD), the PLD itself stores a decryption key or keys loaded by the designer, and includes a decryptor for decrypting an encrypted configuration bitstream as it is loaded into the PLD. The PLD also includes logic for reading header information that indicates whether the bitstream is encrypted, and can accept both encrypted and unencrypted bitstreams. The encryption keys may be stored in non-volatile memory or backed up with a battery so that they are retained when power is removed.