The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2005
Filed:
Feb. 14, 2000
Nobukazu Kondo, Kawasaki, JP;
Kei Suzuki, Kokubunji, JP;
Kouki Noguchi, Kodaira, JP;
Itaru Nonomura, Kawasaki, JP;
Nobukazu Kondo, Kawasaki, JP;
Kei Suzuki, Kokubunji, JP;
Kouki Noguchi, Kodaira, JP;
Itaru Nonomura, Kawasaki, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
In an LSI system using an on-chip bus, when a transfer on the bus is delayed due to a fully loaded buffer in a destination module, a source module cannot proceed to the next processing. Such an unwanted situation is eliminated by a transferring buffer which is provided on a transfer path in an on-chip bus on the LSI for temporarily storing transfer data. With this transferring buffer, even if a buffer within a slave module, specified as the destination, is fully loaded and cannot accept any more transfer, a bus master can transfer data to the transferring buffer provided on the on-chip bus. Thus, the bus master is not kept waiting for execution of a transfer, irrespective of the state of the buffer within the slave, thereby improving the processing performance of the entire system.