The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2005
Filed:
Aug. 06, 2001
Michio Komoda, Tokyo, JP;
Michio Komoda, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
In accordance with a circuit modification method, when it is determined that an aggressor () causes a glitch error in a victim (), the one or more positions where one or more buffers are to be inserted into the victim () are determined based on the coupling capacity Cc between the victim () and the aggressor (). One or more buffers are inserted at one or more internal points of division of the victim () which are determined so that the coupling capacity between each of a plurality of wire segments, into which the victim is to be divided by the one or more internal points of division, and the aggressoris equal to Cc/n, where n is the number of wire segments. Furthermore, since the one or more buffers are inserted so that the coupling capacity Cc is properly divided into the coupling capacities between the plurality of wire segments and the aggressor, the amount of glitch to be caused in each of plurality of wire segment can be reduced and no further addition of buffers is needed.