The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2005
Filed:
Mar. 29, 2001
Terry L. Kendall, Placerville, CA (US);
Terry L. Kendall, Placerville, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A default configuration for a memory is placed in a non-volatile register, while an input logic circuit can provide at least one alternate programmable configuration. A selection circuit can select between the default configuration and the programmable configuration. The selected configuration can be placed into a register that provides active configuration data that is used to determine the actual memory configuration. Upon a reset condition, a reset configuration bit can be used to determine whether the memory will be reset with the default configuration or the active configuration that was being used before the reset.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile