Method for operating a nor-array memory module composed of p-type memory cells

Abstract

A method for writing a memory module includes providing a plurality of memory cells. Each memory cell includes a substrate, a P-type drain and source, a gate, and a stack dielectric layer which stores 2-bit data. Memory cells are arranged in a matrix with gates and sources on the same row connected respectively to the same word line and same source line, and drains on the same column connected to the same bit line. Each line receives a respective voltage with the word line of the memory cell to be written receiving voltage to turn on its P-type channel, the word line of the memory cell not to be written receiving voltage to turn off its P-type channel, and the bit line of the memory cell to be written receiving voltage so that a hot hole in its P-type channel induces hot electron injection into its stack dielectric layer.