The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2005

Filed:

Oct. 14, 2003
Applicants:

John W. Smith, Horseshoe Bay, TX (US);

Belgacem Haba, Cupertino, CA (US);

Inventors:

John W. Smith, Horseshoe Bay, TX (US);

Belgacem Haba, Cupertino, CA (US);

Assignee:

Tessera, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/44 ;
U.S. Cl.
CPC ...
Abstract

An active microelectronic element such as a semiconductor chip or wafer is bonded to an interconnect element having substantially the same coefficient of thermal expansion as the active element using small, rigid bonds, desirably made by a solid-phase bonding technique, which accommodate numerous closely-spaced interconnections. The assembly is provided with terminals movable with respect to the active element and interconnect element. The interconnect element desirably provides low-impedance conductive paths interconnecting active electronic devices within the active element.


Find Patent Forward Citations

Smith, John. (2005). Semiconductor chip package with interconnect structure (U.S. Patent No. 6921713). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6921713

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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