The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2005
Filed:
Feb. 14, 2003
Applicants:
Girolamo Gallo, Avezzano, IT;
Giuliano Gennaro Imondi, Rieti, IT;
Giovanni Naso, Frosinone, IT;
Tommaso Vali, Sezze, IT;
Inventors:
Girolamo Gallo, Avezzano, IT;
Giuliano Gennaro Imondi, Rieti, IT;
Giovanni Naso, Frosinone, IT;
Tommaso Vali, Sezze, IT;
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C016/04 ;
U.S. Cl.
CPC ...
Abstract
A method and apparatus for a memory device including a burst architecture employs a double bus architecture that is multiplexed onto an output bus at clock rate that is doubled. The resulting architecture effectively doubles throughput without increasing memory device latency.
Quick Actions:
Gallo, Girolamo. (2005). Dual bus memory burst architecture (U.S. Patent No. 6917545). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6917545
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