The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2005
Filed:
Feb. 13, 2003
Applicants:
Jason Chang, Fremont, CA (US);
Satwant Singh, Fremont, CA (US);
Ju Shen, Saratoga, CA (US);
Inventors:
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F007/50 ;
U.S. Cl.
CPC ...
Abstract
A programmable logic device includes a plurality of logic blocks. Each logic block includes a plurality of macrocells, with each macrocell being configurable to register a sum of product term output. In addition, the macrocells within each logic block are arranged from a first macrocell to a last macrocell. Each macrocell is associated with a carry-in and a carry-out signal. The macrocells are configured to support a carry cascade such that the carry-out signal from the first macrocell becomes the carry-in signal for the second macrocell, and so on.