The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2005
Filed:
Feb. 05, 1998
James S. Blomgren, Austin, TX (US);
Terence M. Potter, Austin, TX (US);
Stephen C. Horne, Austin, TX (US);
Michael R. Seningen, Austin, TX (US);
Anthony M. Petro, Austin, TX (US);
James S. Blomgren, Austin, TX (US);
Terence M. Potter, Austin, TX (US);
Stephen C. Horne, Austin, TX (US);
Michael R. Seningen, Austin, TX (US);
Anthony M. Petro, Austin, TX (US);
Intrinsity, Inc., Austin, TX (US);
Abstract
The present invention comprises a method and apparatus for an integrated circuit (IC) that uses 1 of N signals to reduce the circuit's wire to wire effective capacitance. The present invention comprises a logic tree circuit coupled to a first 1 of N input signal, a second 1 of N input signal, and a 1 of N output signal where the 1 of N signals' reduce the signal's wire to wire effective capacitance. Other embodiments of the present invention include the use of a 1 of 2 signal, a 1 of 3 signal, a 1 of 4 signal, and a 1 of 8 signal where one and one of the wires of the signal is active.