The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2005
Filed:
Jan. 28, 2003
Katsuya Mizumoto, Tokyo, JP;
Hiroshi Shirota, Tokyo, JP;
Ryosuke Okuda, Tokyo, JP;
Kazuaki Tanida, Hyogo, JP;
Katsuya Mizumoto, Tokyo, JP;
Hiroshi Shirota, Tokyo, JP;
Ryosuke Okuda, Tokyo, JP;
Kazuaki Tanida, Hyogo, JP;
Renesas Technology Corp., Tokyo, JP;
Mitsubishi Electric System, Itami, JP;
LSI Design Corporation, Itami, JP;
Abstract
The number of pulses of a clock signal CLK-A is circularly counted in a count range from '0' to '7', and count signals indicating count values are produced. A clock signal CLK-B having a frequency lower than that of the clock signal CLK-A is produced from count signals of “3” and “7”, and data transfer between a high speed operating block operated in synchronization with the clock signal CLK-A and a low speed operating block operated in synchronization with the clock signal CLK-B is performed in synchronization with the clock signal CLK-B to receive input serial data or transmit output serial data. When a stuff bit of universal Serial Bus is detected in the input serial data or is inserted in the output serial data, a cycle of the clock signal CLK-B is lengthened by one cycle of the clock signal CLK-A.