The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2005
Filed:
Aug. 19, 2003
Cheng-yuan Hsu, Hsinchu, TW;
Chih-wei Hung, Hsin-chu, TW;
Chi-shan Wu, Taipei, TW;
Min-san Huang, Hsinchu, TW;
Cheng-Yuan Hsu, Hsinchu, TW;
Chih-Wei Hung, Hsin-chu, TW;
Chi-Shan Wu, Taipei, TW;
Min-San Huang, Hsinchu, TW;
Powership Semiconductor Corp., Hsinchu, TW;
Abstract
A flash memory cell array comprises a substrate, a string of memory cell structures and source region/drain region. Each of memory cell structures includes a stack gate structure including a select gate dielectric layer, a select gate and a gate cap layer formed on the substrate; a spacer is set on the sidewall of the select gate; a control gate connected to the stack gate structure is set on the one side of the stack gate structure; a floating gate is set between the control gate and the substrate; an inter-gate dielectric layer is set between the control gate and the floating gate; and a tunneling dielectric layer is set between the floating gate and the substrate. The source region/drain region is set in the substrate near outer control gate and stack gate structure of the flash memory cell array.