The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2005
Filed:
Feb. 05, 2003
Nataraj Akkiraju, Fremont, CA (US);
Nataraj Akkiraju, Fremont, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus for inserting flip-flops in a circuit design between a driver and one or more receiver(s) comprising generating a candidate solution to assign the flip-flop at the node in the circuit, calculating a margin at the driver, calculating the margin at the receiver, and inserting the flip-flop at the node to simultaneously maximize the margin at the driver and the margin at the receiver. Furthermore, the method and apparatus determines whether to insert a second flip-flop at a second node in the circuit, and inserting the second flip-flop at the second node in the circuit such that a delay between the flip-flop and the second flip-flop is substantially equal to a clock period.