The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2005

Filed:

Nov. 15, 2002
Applicants:

Suryaprasad Kareenahalli, Folsom, CA (US);

Zohar B. Bogin, Folsom, CA (US);

Mihir D. Shah, Folsom, CA (US);

Inventors:

Suryaprasad Kareenahalli, Folsom, CA (US);

Zohar B. Bogin, Folsom, CA (US);

Mihir D. Shah, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F012/00 ;
U.S. Cl.
CPC ...
Abstract

Embodiments of the present invention provide for adaptively tuning the memory idle timer value in real time. Selected memory idle clock cycles are sampled to dynamically determine an optimized memory idle timer value. To optimize latency during sampling, the number of page hits (N) and number of page misses (N) are multiplied by weighted values Wand W, respectively, such that the weighted function (W*N)−(W*N) is maximized. The weight associated with a page miss (W) is greater than the weight associated with a page hit (W), resulting in a bigger penalty for a page miss than a page hit. The selected setting is continuously optimized.


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