The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2005
Filed:
Apr. 22, 2003
Joo Weon Park, Pleasanton, CA (US);
Poongyeub Lee, San Jose, CA (US);
Eungjoon Park, Fremont, CA (US);
Kyung Joon Han, Palo Alto, CA (US);
Joo Weon Park, Pleasanton, CA (US);
Poongyeub Lee, San Jose, CA (US);
Eungjoon Park, Fremont, CA (US);
Kyung Joon Han, Palo Alto, CA (US);
NexFlash Technologies, Inc., San Jose, CA (US);
Abstract
The problem of bit disturb is reduced by discharging the floating bit lines of a nonvolatile memory array during programming. An illustrative virtual ground memory array uses single transistor floating gate type memory cells that are programmed using Fowler-Nordheim ('FN') tunneling, highly conductive and lengthy bit lines, buried and relatively short sub-bit lines and a programming discharge circuit for controlling spurious voltages on the bit lines that can arise when some of the bit lines are left floating during programming. Discharge control transistor respectively coupled to the bit lines direct current into a discharge section. A discharge section may be provided for each bit line, or shared by all bit lines. The discharge section may be a fixed circuit section for use through the programming process or may be selected from multiple discharge options.