The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Sep. 25, 2002
Applicant:
Conrad Dante, Hillsboro, OR (US);
Inventor:
Conrad Dante, Hillsboro, OR (US);
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract
A method is disclosed to efficiently route in a programmable logic device (PLD) such as a field-programmable gate array (FPGA). The method includes identifying a source and destination pair in a circuit design; determining multiple candidate paths to route a vector between the source and destination pair; and selecting one of the candidate paths for the vector route. Efficiency may be improved by using time-division multiplexing to route multiple connections through a PLD element.