The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2005

Filed:

May. 12, 2000
Applicant:

Mitsuru Sato, Tokyo, JP;

Inventor:

Mitsuru Sato, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ; G06F009/45 ; G06G007/62 ;
U.S. Cl.
CPC ...
Abstract

A device for simulating circuits is provided with an identifying system and a verifying system. The identifying system identifies a pair of wires in which two signals operate simultaneously within an appointed period and a pair of wires in which two signals do not operate almost simultaneously within the appointed period. The verifying system verifies actions of a circuit to be analyzed, under an assumption that the coupling capacitor between the pair of wires in which it is judged by the identifying system that two signals do not simultaneously operate within the appointed period is a ground capacitor.


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Sato, Mitsuru. (2005). Device for simulating circuits, method for simulating the same, and recording medium (U.S. Patent No. 6907394). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6907394

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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