The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2005

Filed:

Sep. 26, 2002
Applicants:

Susan Stirrat, Windsor, CO (US);

Kang Wu, Fort Collins, CO (US);

Inventors:

Susan Stirrat, Windsor, CO (US);

Kang Wu, Fort Collins, CO (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F019/00 ;
U.S. Cl.
CPC ...
Abstract

A test method for the detection of redundant tests and inefficient tests (RITs) used for testing integrated circuits (ICs) and a subsequent optimization of test complexity and test time duration. Empirical data from an execution of all tests of interest in a test plan, flow or suite of tests is collected. The empirical data is collected without stopping at errors. This empirical data is then used to determine the identity of one or more redundant and/or inefficient tests in the test plan. In order to reduce testing time and optimize the test flow, one of more of the following occurs. Redundant tests may be selectively removed, inefficient tests may be re-ordered to allow more efficient tests to be executed earlier in the test flow of the ICs, or some combination of this. RIT information is thus used to optimize the test flow, resulting in a reduction in test complexity and in test duration.


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