The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2005
Filed:
Apr. 06, 2004
Shoji Shukuri, Koganei, JP;
Kazuhiro Komori, Musashimurayama, JP;
Katsuhiko Kubota, Higashiyamato, JP;
Kousuke Okuyama, Kawagoe, JP;
Shoji Shukuri, Koganei, JP;
Kazuhiro Komori, Musashimurayama, JP;
Katsuhiko Kubota, Higashiyamato, JP;
Kousuke Okuyama, Kawagoe, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
0 Owing to the above, even with the single-layer gate process such as single-layer polysilicon gate process, it is possible to obtain a semiconductor integrated circuit such as system LSI in which a nonvolatile memory which is excellent in data retention capability is merged and packaged with a DRAM etc. Further, since the nonvolatile memory of high reliability can be formed without adding any step to a related art manufacturing process, such as a standard CMOS manufacturing process, the present invention may be readily applied to an LSI in which the nonvolatile memory and a logic LSI, or the nonvolatile memory and a DRAM are merged and packaged on an identical semiconductor substrate. Accordingly, a system LSI in which a flash memory is merged and packaged can be provided without increasing the cost of manufacture.