The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2005

Filed:

Nov. 14, 2003
Applicant:

Chung-chin Shih, Jhubei, TW;

Inventor:

Chung-Chin Shih, Jhubei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/8247 ;
U.S. Cl.
CPC ...
Abstract

The present invention relates to a memory device and the fabrication method thereof. A plurality of pairs of floating gates and a plurality of pairs of select gates are formed above each active region. After forming a dielectric layer on each floating gate and on each select gate, a plurality of pairs of word lines and a plurality of pairs of source lines are formed simultaneously. The word lines and the source lines are disposed in a direction vertical to the strip active regions. A plurality of source/drain regions is disposed in the substrate beside the word lines and the source lines. After forming a thick dielectric layer over the substrate, a plurality of source line contacts are formed in the thick dielectric layer for connecting the source/drain regions that are between each pair of source lines and at least connecting one of each pair of the source lines.


Find Patent Forward Citations

Shih, Chung-Chin. (2005). Memory device and fabrication method thereof (U.S. Patent No. 6905930). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6905930

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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