The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2005
Filed:
Mar. 03, 2003
Mutsunori Igarashi, Yokohama, JP;
Mutsunori Igarashi, Yokohama, JP;
Kabushiki Kaisha Toshiba, , JP;
Abstract
A computer-implemented method for designing a semiconductor integrated circuit, which optimizes the propagation delay of a path from a signal input terminal (source) to a signal output terminal (sink) on the same net, includes: calculating the ratio of the total sum of a gate input load capacitance to the wiring capacitance of the path from the source to the sink as a process variation sensitivity relating to the capacitance component of the path to be designed from the source to the sink, based on a circuit design information of a gate level of the semiconductor integrated circuit to be designed; and optimizing the process variation sensitivity relating to the capacitance component of each path in order that the process variation sensitivities relating to the capacitance components of all the paths are smaller than a reference value.