The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2005
Filed:
Apr. 08, 2002
Darlene G. Hamilton, San Jose, CA (US);
Eric M. Ajimine, San Jose, CA (US);
Binh Le, San Jose, CA (US);
Edward Hsia, Saratoga, CA (US);
Ken Tanpairoj, Palo Alto, CA (US);
Darlene G. Hamilton, San Jose, CA (US);
Eric M. Ajimine, San Jose, CA (US);
Binh Le, San Jose, CA (US);
Edward Hsia, Saratoga, CA (US);
Ken Tanpairoj, Palo Alto, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An erase methodology of flash memory cells in a multi-bit memory array with bits disposed in normal and complimentary locations. An erase verify of bits in the normal locations is performed and if a bit in the normal location fails and if the maximum erase pulse count has not been reached, erase pulses are applied to both the normal bit and the complimentary bit. An erase verify of bits in the complimentary locations is performed and if a bit in the complimentary location fails and if the maximum erase pulse count has not been reached, erase pulses are applied to both the complimentary and the normal bit locations. If the bits pass the erase verify, the bits are subjected to a soft programming verify. If the bits are overerased and if the soft programming pulse count has not been reached a soft programming pulse is applied to the overerased bit.