Barrier structures for integration of high k oxides with cu and al electrodes

Abstract

An integrated circuit barrier structure disposed between high dielectric constant metal oxide and Cu or Al electrodes, for preventing diffusion of species such as oxygen, bismuth, or lead from the high dielectric constant metal oxide into the Cu or Al electrodes. Such barrier structure also protects the Cu or Al electrodes against oxidization during deposition of the high dielectric constant metal oxide. The barrier structure can be formed as (1) a single layer of Pt, Ir, IrO, IrO, Ru, RuO, CuO, CuO, AlO, or a binary or ternary metal nitride, e.g., TaN, NbN, HfN, ZrN, WN, WN, TiN, TiSiN, TiAlN, TaSiN, or NbAlN, or (2) double or triple layers of such materials, e.g., Pt/TiAlN, Pt/IrO, Pt/Ir, Ir/TiAlN, Ir/IrO, IrO/TiAlN, IrO/Ir, or IrO/IrO/Ir. Such barrier structures enable Cu or Al electrodes to be used in combination with high dielectric constant metal oxides in microelectronic structures such as ferroelectric stack and trench capacitors, non-volatile ferroelectric memory cells, and dynamic random access memory (DRAM) cells.