The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2005
Filed:
Aug. 02, 2002
John L. Freeman, Jr., Mesa, AZ (US);
Raymond J. Balda, Tempe, AZ (US);
Robert A. Pryor, Mesa, AZ (US);
Joseph L. Petrucci, Jr., Dresden, DE;
Robert J. Johnsen, Scottsdale, AZ (US);
John L. Freeman, Jr., Mesa, AZ (US);
Raymond J. Balda, Tempe, AZ (US);
Robert A. Pryor, Mesa, AZ (US);
Joseph L. Petrucci, Jr., Dresden, DE;
Robert J. Johnsen, Scottsdale, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
In a semiconductor manufacturing method, an emitter region () and a base enhancement region () are formed to provide linear voltage, capacitance and low resistance characteristics. In the manufacturing method, a semiconductor device () is formed on a silicon substrate layer () with an epitaxial layer (). Trenches () are cut into the epitaxial layer () and filled with oxide () to provide reduced junction capacitance and reduced base resistance. The emitter region () and the base enhancement region () are simultaneously formed through an anneal process.