The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2005
Filed:
Jun. 27, 2002
Atul C. Ajmera, Wappingers Falls, NY (US);
Dominic J. Schepis, Wappingers Falls, NY (US);
Michael D. Steigerwalt, Newburgh, NY (US);
Atul C. Ajmera, Wappingers Falls, NY (US);
Dominic J. Schepis, Wappingers Falls, NY (US);
Michael D. Steigerwalt, Newburgh, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The present invention provides a method of formed a nitrided surface layer atop a polysilicon gate electrode that inhibits the growth of an epi silicon layer thereon. Specifically, the method of the present invention includes the steps of: forming a polysilicon layer atop a gate dielectric layer, forming a nitrided surface layer on the polysilicon layer; selectively removing portions of the nitrided surface layer and the polysilicon layer stopping on the gate dielectric layer, while leaving a patterned stack of the nitrided surface layer and the polysilicon layer on the gate dielectric layer; forming sidewall spacers on at least exposed vertical sidewalls of polysilicon layer; removing portions of the gate dielectric layer not protected by the sidewall spacers; and growing an epi silicon layer on exposed horizontal surfaces of an underlying semiconductor substrate.