Clock synchronized non-volatile memory device

Abstract

A nonvolatile memory apparatus which includes a control circuit, plural terminals including a clock, command and other terminals, a converter circuit, and plural of nonvolatile memory cells. The clock terminal receives a clock signal, the command terminal receives commands including a read and program commands, and the control circuit reads out operation steps from a program memory to be executed to control an operation of the received command. In an operation in response to the read command, the control circuit controls reading data in parallel from ones of the nonvolatile memory cells, converting parallel type data to serial type data by the converter circuit, and serially outputting data via the other terminal except the command terminal in response to the clock signal. In an operation in response to the program, the control circuit controls serially receiving data via the other terminal except the command terminal in response to the clock signal, converting serial type data to parallel type data by the converter circuit, and writing data in parallel to ones of the nonvolatile memory cells.