The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2005

Filed:

Feb. 04, 2003
Applicants:

Jeffrey A. Bennett, Sunnyvale, CA (US);

Pete E. Kirkpatrick, San Francisco, CA (US);

Sylvain M. Colin, Redwood City, CA (US);

Jean-marc Verdiell, Palo Alto, CA (US);

Inventors:

Jeffrey A. Bennett, Sunnyvale, CA (US);

Pete E. Kirkpatrick, San Francisco, CA (US);

Sylvain M. Colin, Redwood City, CA (US);

Jean-Marc Verdiell, Palo Alto, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B006/36 ;
U.S. Cl.
CPC ...
Abstract

Optoelectronic modules and methods of manufacturing the same are disclosed. Some of the disclosed modules employ a tape automated bonding substrate (TAB) which is surface mounted with circuit elements. In some examples, the TAB is mounted to a rigid substrate after a fiber submount is passively positioned on the substrate. This modular manufacturing technique limits the value of yield loss. In some example modules, only one active alignment is employed to manufacture the module. Some of the disclosed modules include an optically pluggable connector.


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