The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2005
Filed:
Apr. 28, 2003
Allan T. Davidson, San Jose, CA (US);
Satwant Singh, Fremont, CA (US);
Shari L. Mann, Sandy, UT (US);
Allan T. Davidson, San Jose, CA (US);
Satwant Singh, Fremont, CA (US);
Shari L. Mann, Sandy, UT (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
Systems and methods are disclosed for programmable logic devices requiring a high-speed input/output interface. Hard-macro circuits that are configurable, scalable, and cascadable complement the input/output drivers and the programmable core logic of the programmable logic device. The hard-macro circuits are permanent, high-speed logic circuits that are optimized for the performance requirements of high-speed input/output interface standards. High-speed memory interfaces, clock and data recovery interface standards, source-synchronous interface standards, and system-synchronous interface standards may be supported by the hard-macro circuits.