The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Dec. 17, 2002
Applicant:

Darren Slawecki, Santa Clara, CA (US);

Inventor:

Darren Slawecki, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H011/26 ;
U.S. Cl.
CPC ...
Abstract

The present invention is related to method and apparatus for clock shrinking that includes a detector, a controller, a switching device, and a buffer. The detector includes one or more counters and detects activation of a trigger. The trigger starts and stops the counters. The controller generates select signals based on output from the counters. The switching device receives vectors and receives the select signals from the controller and outputs the vectors in a sequence based on the select signals. The buffer receives a clock signal and the sequence of vectors and outputs one or more shrunk clock pulses in the clock signal based on the received vectors continuously while the trigger is active. A mode selects the desired shrinking pattern for the clock pulses. The shrinking delays in time or advances in time the rising edge and/or the falling edge of the clock pulses.


Find Patent Forward Citations

Loading…