The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Jul. 02, 2003
Applicants:

Tanveer R Khondker, Folsom, CA (US);

Vijay Vuppaladadium, Folsom, CA (US);

Inder Sodhi, Folsom, CA (US);

Venkatesh Prasanna, Folsom, CA (US);

Kedar Mangrulkar, Folsom, CA (US);

Miguel Corvacho, Heredia, CR;

Nakul Arora, Folsom, CA (US);

Inventors:

Tanveer R Khondker, Folsom, CA (US);

Vijay Vuppaladadium, Folsom, CA (US);

Inder Sodhi, Folsom, CA (US);

Venkatesh Prasanna, Folsom, CA (US);

Kedar Mangrulkar, Folsom, CA (US);

Miguel Corvacho, Heredia, CR;

Nakul Arora, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K005/01 ;
U.S. Cl.
CPC ...
Abstract

Circuits and methods align an internal signal with an external signal. A phase lock loop network receives the external signal to generate phase lock loop signals. A programmable ratio decoder provides a code. An alignment unit generates the internal signal based on at least one of the phase lock loop signals. The alignment unit aligns internal signal with the external signal based on the code.


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