The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2005
Filed:
Sep. 17, 2003
Chien-chang Huang, Taipei, TW;
Tie-jiang Wu, Ilan, TW;
Chin-ling Huang, Taipei, TW;
Yu-wei Ting, Taipei, TW;
Bo-ching Jiang, Hualien, TW;
Chien-Chang Huang, Taipei, TW;
Tie-Jiang Wu, Ilan, TW;
Chin-Ling Huang, Taipei, TW;
Yu-Wei Ting, Taipei, TW;
Bo-Ching Jiang, Hualien, TW;
Nanya Technology Corporation, Taoyuan, TW;
Abstract
A test structure of a DRAM array includes a substrate. A transistor is formed on the substrate and has a first region and a second region as source/drain regions thereof. A deep trench capacitor is formed adjacent to the transistor and has a first width. A shallow trench isolation is formed in a top portion of the deep trench capacitor and has a second width. The second width is substantially shorter than the first one. A third region is formed adjacent to the deep trench capacitor. A first contact is formed on the substrate and contacts with the first region. A second contact is formed on the substrate and contacts with the third region.