The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2005

Filed:

Sep. 24, 1999
Applicants:

Laura A. Weber, Austin, TX (US);

Fritz A. Boehm, Dripping Springs, TX (US);

Jean Anne Booth, Austin, TX (US);

Jeffrey S. Leonard, Austin, TX (US);

Shawn D. Strawbridge, Austin, TX (US);

Douglas N. Good, Austin, TX (US);

Inventors:

Laura A. Weber, Austin, TX (US);

Fritz A. Boehm, Dripping Springs, TX (US);

Jean Anne Booth, Austin, TX (US);

Jeffrey S. Leonard, Austin, TX (US);

Shawn D. Strawbridge, Austin, TX (US);

Douglas N. Good, Austin, TX (US);

Assignee:

Intrinsity, Inc., Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

The present invention is a monitor that detects a design verification event and reports a status event to a database. One embodiment of the present invention comprises a monitor declaration, zero or more signal declarations, zero or more bus declarations and one or more logic expressions. A logic expression, formulated using the declared signals and buses, is used to evaluate whether a specific verification event has occurred. The present invention further comprises a monitor where the signal of the signal declaration of the monitor is an N-Nary signal. Additionally, the present invention comprises a parser to translate the monitor source file code into a standard computer language code.


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