The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2005
Filed:
Jul. 18, 2002
Gin Yee, Sunnyvale, CA (US);
Sudhakar Bobba, Sunnyvale, CA (US);
Claude Gauthier, Fremont, CA (US);
Dean Liu, Sunnyvale, CA (US);
Lynn Ooi, Santa Clara, CA (US);
Pradeep Trivedi, Sunnyvale, CA (US);
Gin Yee, Sunnyvale, CA (US);
Sudhakar Bobba, Sunnyvale, CA (US);
Claude Gauthier, Fremont, CA (US);
Dean Liu, Sunnyvale, CA (US);
Lynn Ooi, Santa Clara, CA (US);
Pradeep Trivedi, Sunnyvale, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A device that uses an input clock signal to generate an output clock signal with a desired frequency is provided. The device uses a voltage controlled delay element that outputs a reset signal to a flip-flop dependent on a bias signal and the input clock signal. When triggered, the flip-flop outputs a transition on the output clock signal, which, in turn, serves as an input to a duty cycle corrector that generates the bias signal dependent on the configuration of the duty cycle corrector. The duty cycle corrector may be configured to generate the bias signal so as to be able to operatively control the duty cycle of the output clock signal.