The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2005

Filed:

Jun. 13, 2003
Applicants:

Isao Motegi, Yokohama, JP;

Eiji Nagata, Kawasaki, JP;

Inventors:

Isao Motegi, Yokohama, JP;

Eiji Nagata, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K017/16 ; H03K019/003 ;
U.S. Cl.
CPC ...
Abstract

An inter-block interface circuit which effectively prevents occurrences of inconveniences (for example, such that a shoot-through current flows due to unsteady potential in wiring) caused by switching off a power supply of a block, using simple circuitry, in LSI such that signals are communicated between the blocks and the power supplies of the blocks are interrupted independently. In the circuit, gate circuitsandare respectively provided in blocksandthat communicate signals with one another, and interface control circuitdynamically controls respective input levels of gate circuitsand. In other words, the circuitfixes an input level of gate circuitorin a block whose power supply is ON to 'L', and thereby compulsively fixes an output level of the gate circuit to 'L'.


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