The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2005
Filed:
Mar. 25, 2003
Bor-ru Sheu, Hsinchu, TW;
Bor-Ru Sheu, Hsinchu, TW;
Winbond Electronics Corp., Hsinchu, TW;
Abstract
The structure and manufacturing method of a non-volatile semiconductor memory device are provided. The method for manufacturing a cell stack includes steps of: (a) providing a substrate; (b) forming on the substrate an oxide layer, a first conductive layer, a first dielectric layer, and a second conductive layer sequentially; (c) etching back to form a first recess pattern; (d) filling with a second dielectric layer; (e) depositing a third dielectric layer; (f) depositing a fourth dielectric layer; (g) etching to form a second recess pattern; (h) depositing a barrier layer on the second recess pattern; and (i) filling with a third conductive layer. The proposed structure of a cell stack includes a substrate, an oxide layer, a first stack, a second dielectric layer, a second stack, a third dielectric layer, and a fourth dielectric layer.