Semiconductor devices and methods for manufacturing the same

Abstract

Certain embodiments of the present invention relate to a semiconductor device having a DRAM including a cell capacitor formed in a DRAM region of a semiconductor substrate, and a capacitor element formed in an analog element region of the semiconductor substrate. The semiconductor device includes an interlayer dielectric layer, an embedded connection layer and a connection layer, wherein the interlayer dielectric layer is located between the semiconductor substrate and the capacitor element. The connection layer and the embedded connection layer are used to electrically connect a lower electrode of the capacitor element to another semiconductor element. The connection layer is located in a common layer of a bit line that is a component of the DRAM. The embedded connection layer is located in a connection hole formed in the interlayer dielectric layer. One end of the embedded connection layer connects to the lower electrode at a bottom surface of the lower electrode, and another end of the embedded connection layer connects to the connection layer.