The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2005
Filed:
Oct. 25, 2001
Cecilia T. Chen, Alameda, CA (US);
Jyh-ming Jong, Saratoga, CA (US);
Wai Fong, San Jose, CA (US);
Leo Yuan, Los Altos, CA (US);
Brian L. Smith, Sunnyvale, CA (US);
Cecilia T. Chen, Alameda, CA (US);
Jyh-Ming Jong, Saratoga, CA (US);
Wai Fong, San Jose, CA (US);
Leo Yuan, Los Altos, CA (US);
Brian L. Smith, Sunnyvale, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A source synchronous test methodology and apparatus. In one embodiment, an integrated circuit (IC) configured for source synchronous I/O transactions may be a device under test (DUT) and may be mounted to a load board for testing. The load board may be electrically coupled to a test system. The test system may shift first test data into a first IC on the load board. The first chip may then transmit the first test data through a source synchronous line, or a source synchronous link having a plurality of lines, to a second IC. Second test data produced responsive to the source synchronous transmission is then shifted from the second IC to the tester. The second test data is then analyzed. The analysis may comprise comparing the second data to expected data, and/or may also comprise analyzing the second data with respect to an eye window.