The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2005

Filed:

Dec. 09, 2003
Applicants:

Jin-won Jun, Seoul, KR;

Kong-soo Cheong, Seoul, KR;

Jeong-ho Shin, Seoul, KR;

Inventors:

Jin-won Jun, Seoul, KR;

Kong-soo Cheong, Seoul, KR;

Jeong-ho Shin, Seoul, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/336 ; H01L021/3205 ; H01L021/4763 ;
U.S. Cl.
CPC ...
Abstract

Provided is a method of forming a thick metal silicide layer on a gate electrode. The method includes forming a gate electrode of a transistor on a semiconductor substrate, wherein a hard mask is formed on the gate electrode, forming a spacer on a sidewall of the gate electrode, forming a first silicide layer on a portion of the semiconductor substrate, adjacent to the spacer, forming an insulating layer on the first suicide layer to expose upper portions of the hard mask and the spacer, selectively etching the exposed upper portions of the hard mask and the spacer using the insulating layer as an etch mask until the top surface and the sidewall of the gate electrode are exposed, forming a metal layer on the exposed top surface and sidewall of the gate electrode, and forming a second silicide layer on the gate electrode by siliciding the metal layer.


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