The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2005
Filed:
Oct. 08, 2003
Toshihiro Iizuka, Kanagawa, JP;
Tomoe Yamamoto, Kanagawa, JP;
Toshihiro Iizuka, Kanagawa, JP;
Tomoe Yamamoto, Kanagawa, JP;
NEC Electronics Corporation, Kawasaki, JP;
Abstract
A capacitor is provided that is optimal for use in DRAM and has high dielectric constant, and allows leakage current flowing therethrough to be maintained at a low level, and further, permits dependence of the leakage current on temperatures to be small. That is, capacitor openings are formed in an inter layer silicon oxide layer and a TiN film is patterned so that TiN films are left only within the openings to form lower electrodes within the openings. Subsequently, a Zr- and/or Hf-containing oxide film (represented by the formula, multicomponent Zr.sub.x.Hf.sub.1-x.O.sub.2 film (0≦x≦1)) formed from a metal-containing organic compound as a reactant and a Ti-containing oxide film are laminated to form capacitor dielectrics. After deposition of the Zr- and/or Hf-containing oxide film, the Zr- and/or Hf-containing oxide film is subjected to heat treatment to be performed in an oxidizing ambient to remove residual carbon being retained in the Zr- and/or Hf-containing oxide film, leading to formation of a capacitor that is optimal for use in DRAM and has high dielectric constant, and allows leakage current flowing therethrough to be maintained at a low level.