The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2005
Filed:
Dec. 14, 2001
Tzung-chin Chang, San Jose, CA (US);
Chiakang Sung, Milpitas, CA (US);
Khai Nguyen, San Jose, CA (US);
Joseph Huang, San Jose, CA (US);
Bonnie Wang, Cupertino, CA (US);
Yan Chong, Stanford, CA (US);
Xiaobao Wang, Santa Clara, CA (US);
Philip Pan, Fremont, CA (US);
Gopinath Rangan, Santa Clara, CA (US);
IN Whan Kim, San Jose, CA (US);
Tzung-Chin Chang, San Jose, CA (US);
Chiakang Sung, Milpitas, CA (US);
Khai Nguyen, San Jose, CA (US);
Joseph Huang, San Jose, CA (US);
Bonnie Wang, Cupertino, CA (US);
Yan Chong, Stanford, CA (US);
Xiaobao Wang, Santa Clara, CA (US);
Philip Pan, Fremont, CA (US);
Gopinath Rangan, Santa Clara, CA (US);
In Whan Kim, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A Schmitt trigger circuit has an adjustable hysteresis characteristic by providing a plurality of feedback circuits that differently affect at least one, and preferably both, of the circuit's upper trip point level and lower trip point level. The upper trip point level can be adjusted by selecting a desired feedback circuit from a first set of feedback circuits, and/or the lower trip point level can be adjusted by selecting a desired feedback circuit from a second set of feedback circuits. Feedback circuit selection is achieved by one or more control signals that may be programmable. The hysteresis characteristic can be adjusted to meet desired noise margin, delay, and input recognition criteria at different VCC levels. The Schmitt trigger circuit may be a CMOS Schmitt trigger with two input stage NMOS, two input stage PMOS transistors, a first set of NMOS feedback circuits, and a second set of PMOS feedback circuits.