The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2005

Filed:

Aug. 15, 2003
Applicants:

Naoki Kanda, Sagamihara, JP;

Arito Ogawa, Nei, JP;

Eisuke Nishitani, Yokohama, JP;

Miwako Nakahara, Yokohama, JP;

Tadanori Yoshida, Hitachinaka, JP;

Kiyoshi Ogata, Kawasaki, JP;

Inventors:

Naoki Kanda, Sagamihara, JP;

Arito Ogawa, Nei, JP;

Eisuke Nishitani, Yokohama, JP;

Miwako Nakahara, Yokohama, JP;

Tadanori Yoshida, Hitachinaka, JP;

Kiyoshi Ogata, Kawasaki, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L029/94 ;
U.S. Cl.
CPC ...
Abstract

When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.


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