The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2005
Filed:
May. 28, 2004
Yoshiaki Himeno, Mie-ken, JP;
Hiroaki Tsunoda, Mie-ken, JP;
Yoshiaki Himeno, Mie-ken, JP;
Hiroaki Tsunoda, Mie-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A method for manufacturing a semiconductor memory device having a memory region and a peripheral region, including forming a memory cell on the memory region and a peripheral transistor on the peripheral region, the memory cell having a first gate electrode and a first diffusion layer, the peripheral transistor having a second gate electrode and a second diffusion layer; forming a silicon nitride layer above an upper surface and a side surface of the first gate electrode of the memory cell and above an upper surface and a side surface of the second gate electrode of the peripheral transistor; removing the silicon nitride layer that is formed above the upper surface of the second gate electrode of the peripheral transistor; forming an interlayer insulating film above the memory cell and the peripheral transistor; forming a first contact hole that reaches the upper surface of the second gate electrode of the peripheral transistor by removing a portion of the interlayer insulating film; and forming a conductive layer in the first contact hole that is electrically connected to the second gate electrode of the peripheral transistor.