The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2005

Filed:

Jun. 27, 2003
Applicants:

Tsukasa Ooishi, Hyogo, JP;

Takaharu Tsuji, Hyogo, JP;

Masatoshi Ishikawa, Hyogo, JP;

Hideto Hidaka, Hyogo, JP;

Hiroshi Kato, Hyogo, JP;

Inventors:

Tsukasa Ooishi, Hyogo, JP;

Takaharu Tsuji, Hyogo, JP;

Masatoshi Ishikawa, Hyogo, JP;

Hideto Hidaka, Hyogo, JP;

Hiroshi Kato, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

A logic portion outputs to a DRAM portion a start address and an end address indicating a memory region where data to be stored is present prior to transition to power down mode having reduced current consumption. In the power down mode, a refresh control unit holds the start address and the end address and controls refresh to be carried out for data only in a region requiring refresh. The power supply of the logic portion is set in off state in the power down mode and accordingly a semiconductor device can consume reduced current while holding data.


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