The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2005

Filed:

Dec. 18, 2001
Applicants:

André Zaccarin, Quebec, CA;

Trevor Pering, Mountain View, CA (US);

Marco Y. Wirasinghe, Sunnyvale, CA (US);

Inventors:

André Zaccarin, Quebec, CA;

Trevor Pering, Mountain View, CA (US);

Marco Y. Wirasinghe, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F001/26 ;
U.S. Cl.
CPC ...
Abstract

A power management system for digital circuitry uses data buffer monitoring to determine appropriate processor clock speed or voltage. This allows a processor to be switched from a low power state to a high power state when a monitored data buffer level feeding data to a power intensive application is greater than a second memory buffer level. The processor is switched from a high power state to a low power state when the monitored data buffer level is less than a first memory buffer level.


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