The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2005

Filed:

Dec. 20, 2002
Applicants:

Nestor A. Bojarczuk, Jr., Poughkeepsie, NY (US);

Eduard A. Cartier, New York, NY (US);

Matthew W. Copel, Yorktown Heights, NY (US);

Supratik Guha, Chappaqua, NY (US);

Inventors:

Nestor A. Bojarczuk, Jr., Poughkeepsie, NY (US);

Eduard A. Cartier, New York, NY (US);

Matthew W. Copel, Yorktown Heights, NY (US);

Supratik Guha, Chappaqua, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L029/00 ;
U.S. Cl.
CPC ...
Abstract

A method of forming a dielectric stack device having a plurality of layers comprises the steps of providing a silicon substrate, forming a metal-oxide layer on a silicon oxide layer which is formed on the silicon substrate, and performing an annealing with respect to the metal-oxide layer and the silicon oxide layer until a silicate layer is formed to replace the metal-oxide layer and the silicon oxide layer is removed, wherein the annealing is performed at a temperature between about 800° C. and about 1000° C. for a time period between about 1 second and about 10 minutes. After forming the silicon oxide layer on the silicon substrate, the metal-oxide layer may be deposited on the silicon oxide layer. Alternatively, the metal-oxide layer may be deposited on the silicon substrate, and the silicon oxide layer grows between the metal-oxide layer and the silicon substrate. The metal-based oxide is preferably an Yttrium-based oxide.


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