The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2005
Filed:
Oct. 04, 1999
Nagasubramanian Gurumoorthy, Hillsboro, OR (US);
Shivaprasad Sadashivaiah, Puyallup, WA (US);
Nagasubramanian Gurumoorthy, Hillsboro, OR (US);
Shivaprasad Sadashivaiah, Puyallup, WA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A data processing system providing high performance two-dimensional and three-dimensional graphics includes at least one system processor, chipset core logic, a graphics processor, main memory storing computer software and data including operating system software, and a graphics address remapping table (GART). The chipset logic operates on first-sized memory pages, while the operating system operates on larger, second-sized memory pages. In one embodiment GART driver software maps each second-sized page to Z first-sized pages by filling up the GART with Z entries per second-sized page, where Z is the rounded integer number of first-sized pages per second-sized page. In another embodiment, an address translation function converts a first page number, corresponding to a first-sized page, issuing from a system processor into a second page number, corresponding to a second-sized page, and a page offset within the second-sized page. Also described is an integrated circuit for mapping memory pages of disparate sizes, and a computer-readable medium storing a data structure for implementing the page mapping method and apparatus.