The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2005
Filed:
Nov. 25, 2003
Satoshi Iwahashi, Ome, JP;
Keiichi Higeta, Hamura, JP;
Satoshi Iwahashi, Ome, JP;
Keiichi Higeta, Hamura, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A semiconductor memory device comprises a memory-cell array for storing data, a peripheral circuit for carrying out an operation to read out or write data from or into the memory-cell array, read clock generation circuits (and) each used for generating a read clock signal to be supplied to the peripheral circuit in the operation to read out data from the memory-cell array, write clock generation circuits (and) each used for generating a write clock signal to be supplied to the peripheral circuit in the operation to write data into the memory-cell array. Since the pulse widths of the clock signals in read and writes are adjusted individually, margin insufficiencies of the pulse widths can be evaluated and results of the evaluation can be fed back to a design phase for, among other purposes, correction of a layout.