The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2005

Filed:

Sep. 20, 2000
Applicants:

Belgacem Haba, Cupertino, CA (US);

Sayeh Khalili, San Jose, CA (US);

Donald R. Mullen, Mountain View, CA (US);

Nader Gamini, Monte Sereno, CA (US);

Inventors:

Belgacem Haba, Cupertino, CA (US);

Sayeh Khalili, San Jose, CA (US);

Donald R. Mullen, Mountain View, CA (US);

Nader Gamini, Monte Sereno, CA (US);

Assignee:

Rambus, Inc., Los Altos, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K007/02 ;
U.S. Cl.
CPC ...
Abstract

A memory architecture includes a first substrate containing multiple memory devices and a first channel portion extending across the first substrate. The architecture further includes a second substrate containing multiple memory devices and a second channel portion extending across the second substrate. A connector couples the first channel portion to the second channel portion to form a single channel. The connector includes a first slot that receives an edge of the first substrate and a second slot that receives an edge of the second substrate. Another connector has a pair of slots that receive opposite edges of the first and second substrates. The channel portions extend across the substrates in a substantially linear path. Each channel portion includes multiple conductors having lengths that are approximately equal.


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