The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2005
Filed:
Jul. 09, 2003
Xisheng Zhang, Sunnyvale, CA (US);
Hancheng Liang, San Jose, CA (US);
Zhihong Liu, Cupertino, CA (US);
Jianhe Guo, Santa Clara, CA (US);
Xisheng Zhang, Sunnyvale, CA (US);
Hancheng Liang, San Jose, CA (US);
Zhihong Liu, Cupertino, CA (US);
Jianhe Guo, Santa Clara, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.